Cypress Semiconductor /psoc63 /BLE /BLELL /RECEIVE_TRIG_CTRL

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Interpret as RECEIVE_TRIG_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ACC_TRIGGER_THRESHOLD 0ACC_TRIGGER_TIMEOUT

Description

Receive trigger control

Fields

ACC_TRIGGER_THRESHOLD

Access address match threshold value. Number of bits of ac-cess address that should match with the expected access ad-dress to trigger an access code match.

Max value : 32 (for 32-bit access address) Lower values may be programmed for bad radios or channels but care must be taken to ensure there are no ‘false’ matches due to reduced number of bits required to match.

ACC_TRIGGER_TIMEOUT

If access address match does not occur then within this time from the start of receive operation, the receive operation times out and stops. An internal counter value of 1usec resolution is continuously compared with the value programmed. Max value :0xFF

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